Invention Grant
US07865747B2 Adaptive issue queue for reduced power at high performance 有权
自适应问题队列,在高性能下降低功耗

Adaptive issue queue for reduced power at high performance
Abstract:
A method and structure of reducing power consumption in a microprocessor includes at least one storage structure in which the activity of the storage structure is dynamically measured and the size of the structure is controlled based on the activity. The storage structure includes a plurality of blocks, and the size of the structure is controlled in units of block size, based on activity measured in the blocks. An exemplary embodiment is an adaptive out-of-order queue.
Public/Granted literature
Information query
Patent Agency Ranking
0/0