Invention Grant
- Patent Title: Method for manufacturing a wafer level package
- Patent Title (中): 晶圆级封装的制造方法
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Application No.: US12023853Application Date: 2008-01-31
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Publication No.: US07867817B2Publication Date: 2011-01-11
- Inventor: Stephan Dobritz , Harry Hedler , Henning Mieth
- Applicant: Stephan Dobritz , Harry Hedler , Henning Mieth
- Applicant Address: DE Munich
- Assignee: Qimonda AG
- Current Assignee: Qimonda AG
- Current Assignee Address: DE Munich
- Agent John S. Economou
- Main IPC: H01L21/00
- IPC: H01L21/00
Abstract:
A method for manufacturing a wafer level package of an integrated circuit element for direct attachment to a wiring board is disclosed. An integrated circuit element includes input/output pads located on an active side. A non-conductive support structure is formed on the active side of the integrated circuit element in an area that is free from input/output pads. A conductive path is formed upon the support structure and a non-conductive coating is formed on over the active side of the integrated circuit element such that a surface is formed which leaves interface pads accessible.
Public/Granted literature
- US20090194881A1 Method for Manufacturing a Wafer Level Package Public/Granted day:2009-08-06
Information query
IPC分类:
