Invention Grant
- Patent Title: Super-self-aligned trench-dmos structure and method
- Patent Title (中): 超自对准沟槽dmos结构和方法
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Application No.: US12189062Application Date: 2008-08-08
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Publication No.: US07867852B2Publication Date: 2011-01-11
- Inventor: François Hébert
- Applicant: François Hébert
- Applicant Address: US CA Sunnyvale
- Assignee: Alpha and Omega Semiconductor Incorporated
- Current Assignee: Alpha and Omega Semiconductor Incorporated
- Current Assignee Address: US CA Sunnyvale
- Agency: JDI Patent
- Agent Joshua D. Isenberg
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
A semiconductor device includes a P-body layer formed in an N-epitaxial layer; a gate electrode formed in a trench in the P-body and N-epitaxial layer; a top source region formed from the P-body layer next to the gate electrode; a gate insulator disposed along a sidewall of the gate electrode between the gate electrode and the source, between the gate electrode and the P-body and between the gate electrode and the N-epitaxial layer; a cap insulator disposed on top of the gate electrode; and an N+ doped spacer disposed along a sidewall of the source and a sidewall of the gate insulator. The source includes N+ dopants diffused from the spacer. A body contact region containing P-type dopants is formed from the N-epitaxial layer. The contact region touches one or more P-doped regions of the P-body layer and the source. Methods for manufacturing such a device are also disclosed. Embodiments of this invention may also be applied to P-channel devices.
Public/Granted literature
- US20100032751A1 SUPER-SELF-ALIGNED TRENCH-DMOS STRUCTURE AND METHOD Public/Granted day:2010-02-11
Information query
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