Invention Grant
- Patent Title: Semiconductor chip package and multichip package
- Patent Title (中): 半导体芯片封装和多芯片封装
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Application No.: US12458808Application Date: 2009-07-23
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Publication No.: US07868470B2Publication Date: 2011-01-11
- Inventor: Norio Takahashi
- Applicant: Norio Takahashi
- Applicant Address: JP Tokyo
- Assignee: Oki Semiconductor Co., Ltd.
- Current Assignee: Oki Semiconductor Co., Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Rabin & Berdo, P.C.
- Priority: JP2003-429531 20031225
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52
Abstract:
The present invention provides a multichip package wherein a plurality of semiconductor chip packages (100) in each of which first electrode pads (16a) provided in a main surface of a semiconductor chip, and first bonding pads (20a) and first central bonding pads (18a) formed in an upper area of the main surface are respectively electrically connected by first redistribution wiring layers (24) in a one-to-one correspondence relationship, and second electrode pads (17b), and second bonding pads (22b) and second central bonding pads (18b) formed in an upper area of the main surface are respectively electrically connected by second redistribution wiring layers (26) in a one-to-one correspondence relationship, are stacked on one another.
Public/Granted literature
- US20090309205A1 Semiconductor chip package and multichip package Public/Granted day:2009-12-17
Information query
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