A semiconductor device comprises an overflow detection circuit (5) which compares an output of at least one integrator in a ΔΣ modulator (13) with a predetermined value to output an overflow detection signal; an overflow frequency calculation circuit (6) which calculates an overflow frequency value that is the frequency of the output from the integrator being outside a normal range, based on the overflow detection signal, and outputs the overflow frequency value; an oscillation judgment circuit (7) which judges whether the ΔΣ modulator (13) is in the oscillation state or not based on the overflow frequency value; and an oscillation halt circuit which suppresses oscillation of the ΔΣ modulator (13) when the oscillation judgment circuit (7) judges that the ΔΣ modulator is in the oscillation state; wherein it is determined whether the output of the integrator is temporarily outside the normal range due to noise or the like or the output of the integrator is outside the normal range due to oscillation, by obtaining the frequency with which the output of the integrator is outside the normal range, and the oscillation of the ΔΣ modulator (13) is suppressed only when it is oscillated.