Invention Grant
- Patent Title: Semiconductor storage device
- Patent Title (中): 半导体存储设备
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Application No.: US12409958Application Date: 2009-03-24
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Publication No.: US07869260B2Publication Date: 2011-01-11
- Inventor: Yoshihiro Ueda
- Applicant: Yoshihiro Ueda
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2008-170235 20080630
- Main IPC: G11C11/00
- IPC: G11C11/00

Abstract:
A plurality of memory cells, each including a variable resistance element capable of having four or more values, are arranged at intersections of first wirings and second wirings. A control circuit selectively drives the first and second wirings. A sense amplifier circuit compares, with a reference voltage, a voltage generated by a current flowing through a selected memory cell. A reference voltage generation circuit includes: a resistance circuit including first and second resistive elements connected in parallel. Each of the first resistive elements has a resistance value substantially the same as a maximum resistance value in the variable resistance elements, and each of the second resistive elements has a resistance value substantially the same as a minimum resistance value in the variable resistance elements. A current regulator circuit averages currents flowing through the first and second resistive elements.
Public/Granted literature
- US20090323395A1 SEMICONDUCTOR STORAGE DEVICE Public/Granted day:2009-12-31
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