Invention Grant
- Patent Title: Phase change memory erasable and programmable by a row decoder
- Patent Title (中): 相变存储器可由行解码器擦除和编程
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Application No.: US11850507Application Date: 2007-09-05
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Publication No.: US07869268B2Publication Date: 2011-01-11
- Inventor: Thierry Giovinazzi , Francesco La Rosa
- Applicant: Thierry Giovinazzi , Francesco La Rosa
- Applicant Address: FR Montrouge
- Assignee: STMicroelectronics SA
- Current Assignee: STMicroelectronics SA
- Current Assignee Address: FR Montrouge
- Agency: Seed IP Law Group PLLC
- Agent Lisa K. Jorgenson; Robert Iannucci
- Priority: FR0607744 20060905
- Main IPC: G11C11/00
- IPC: G11C11/00

Abstract:
An integrated circuit includes a non-volatile memory having memory cells each having a memory point and a selection transistor having a control terminal connected to a word line, a row decoder for supplying word line selection signals, and at least one generator for supplying memory cells with an erase or programming voltage or current. Word line drivers are interposed between the row decoder and the word lines, and are arranged for applying to a word line selected by the row decoder control pulses, the profile of which corresponds to a profile of an erase or programming voltage or current pulse. Application is for particularly but not exclusively to phase change memories.
Public/Granted literature
- US20080062752A1 PHASE CHANGE MEMORY ERASABLE AND PROGRAMMABLE BY A ROW DECODER Public/Granted day:2008-03-13
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