Invention Grant
US07869558B2 Method and apparatus for calibrating a counting circuit 有权
用于校准计数电路的方法和装置

Method and apparatus for calibrating a counting circuit
Abstract:
Timing circuitry may use control circuitry to control calibration circuitry to calibrate a counter so that an adder and a calibration period counter are not required. Concatenation circuitry may be used to concatenate a portion of the counter value and the calibration value to provide a calibrated value to the counter. The results from match circuitry may be used to provide status and control information to a calibration history bit and to an enable circuit. The counter may be an up counter or a down counter.
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