Invention Grant
- Patent Title: Method and apparatus for calibrating a counting circuit
- Patent Title (中): 用于校准计数电路的方法和装置
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Application No.: US12464581Application Date: 2009-05-12
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Publication No.: US07869558B2Publication Date: 2011-01-11
- Inventor: Evgeni Margolis
- Applicant: Evgeni Margolis
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Agent Susan C. Hill; Joanna G. Chiu
- Main IPC: G06M3/00
- IPC: G06M3/00 ; H03K21/40

Abstract:
Timing circuitry may use control circuitry to control calibration circuitry to calibrate a counter so that an adder and a calibration period counter are not required. Concatenation circuitry may be used to concatenate a portion of the counter value and the calibration value to provide a calibrated value to the counter. The results from match circuitry may be used to provide status and control information to a calibration history bit and to an enable circuit. The counter may be an up counter or a down counter.
Public/Granted literature
- US20100290580A1 METHOD AND APPARATUS FOR CALIBRATING A COUNTING CIRCUIT Public/Granted day:2010-11-18
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