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US07870331B2 Fully-buffered dual in-line memory module with fault correction 有权
具有故障校正功能的全缓冲双列直插式内存模块

Fully-buffered dual in-line memory module with fault correction
Abstract:
A memory system comprises first memory that includes memory cells that are selectively refreshed at a refresh rate. A test module tests operation of the memory cells at the refresh rate and that identifies T of the memory cells that are inoperable when refreshed at the refresh rate, where T is an integer greater than zero. Content addressable memory (CAM) includes D CAM memory cells where D is an integer greater than or equal to one. An adaptive refresh module selectively adjusts a refresh rate of the first memory based on T and D.
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