Invention Grant
US07870466B2 Parallel cyclic code generation device and parallel cyclic code error detection device
有权
并行循环码生成装置和并行循环码错误检测装置
- Patent Title: Parallel cyclic code generation device and parallel cyclic code error detection device
- Patent Title (中): 并行循环码生成装置和并行循环码错误检测装置
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Application No.: US12198389Application Date: 2008-08-26
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Publication No.: US07870466B2Publication Date: 2011-01-11
- Inventor: Masahiro Shigihara , Toru Takamichi
- Applicant: Masahiro Shigihara , Toru Takamichi
- Applicant Address: JP Tokyo
- Assignee: NEC Corporation
- Current Assignee: NEC Corporation
- Current Assignee Address: JP Tokyo
- Agency: Sughrue Mion, PLLC
- Priority: JP2007-220948 20070828
- Main IPC: H03M13/00
- IPC: H03M13/00

Abstract:
To eliminate the need for buffering in order to calculate data length information on data as an object of computation, a first exclusive-OR unit 53 executes computation of exclusive-OR of a cyclic code R(x) of the integral multiple bit bits block A(x) and a data string of M bits, containing the fraction bits block B(x). A first shifting unit 54 shifts the exclusive-OR of the cyclic code R(x) and the data string of M bits, containing the fraction bits block B(x), by {M−H(k)} bits toward a least significant side, where M is a parallel width and H(k) is a bit length of the fraction bits block B(x). An R′(x) generation unit 55 generates a cyclic code R′(x) that is a cyclic code of the data after shifting. To obtain R″(x), a second shifting unit 56 shifts the cyclic code R(x) by H(k) bits toward a most significant side. A second exclusive-OR unit 57 executes computation of exclusive-OR of the cyclic code R′(x) and data R″(x).
Public/Granted literature
- US20090106631A1 PARALLEL CYCLIC CODE GENERATION DEVICE AND PARALLEL CYCLIC CODE ERROR DETECTION DEVICE Public/Granted day:2009-04-23
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