Invention Grant
US07870533B2 Delay analysis apparatus, delay analysis method and computer product 有权
延迟分析装置,延迟分析方法和计算机产品

Delay analysis apparatus, delay analysis method and computer product
Abstract:
Within-die delay distributions and die-to-die delay distributions of two arbitrary paths in an analysis target circuit are extracted from a delay distribution library, and an effect index indicative of a relative error of an overall path delay distribution of one path and an overall path delay distribution when the two paths are integrated as one path is calculated based on the within-die delay distributions and the die-to-die delay distributions of the two paths. When the effect index is determined to be equal to or above a threshold, the overall path delay distribution of the two paths integrated as one path is calculated. Hence, a path that affects an analysis result alone is selected to execute a statistical Max operation, thereby increasing a speed of delay analysis processing.
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