Invention Grant
- Patent Title: Method and apparatus for manufacturing stacked-type semiconductor device
- Patent Title (中): 叠层型半导体器件的制造方法和装置
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Application No.: US11200037Application Date: 2005-08-10
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Publication No.: US07871856B2Publication Date: 2011-01-18
- Inventor: Atsushi Yoshimura
- Applicant: Atsushi Yoshimura
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Finnegan, Henderson, Garrett & Dunner, L.L.P.
- Priority: JP2004-234461 20040811
- Main IPC: H01L21/44
- IPC: H01L21/44

Abstract:
A method of manufacturing a stacked-type semiconductor device, comprises: arranging a plurality of stacked chips obtained by stacking semiconductor chips on a plurality of stages on a support substrate; connecting a semiconductor chip of each stage in each stacked chip and the support substrate by wire while performing heating in units of stacked chips; performing plastic molding of each stacked chip; and separating the stacked chips from each other; an apparatus for manufacturing a stacked-type semiconductor device, comprising divided heater blocks formed under a support substrate on which a plurality of stacked chips obtained by stacking a plurality of semiconductor chips are arranged, the divided heater blocks being formed with respect to the stacked chips, and a heating device to selectively transmit heat to a stacked chip subjected to a wire bonding.
Public/Granted literature
- US20060038275A1 Method and apparatus for manufacturing stacked-type semiconductor device Public/Granted day:2006-02-23
Information query
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