Invention Grant
US07871913B2 Method for manufacturing semiconductor device having vertical transistor
有权
具有垂直晶体管的半导体器件的制造方法
- Patent Title: Method for manufacturing semiconductor device having vertical transistor
- Patent Title (中): 具有垂直晶体管的半导体器件的制造方法
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Application No.: US12335668Application Date: 2008-12-16
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Publication No.: US07871913B2Publication Date: 2011-01-18
- Inventor: Jong Han Shin , Hyung Soon Park , Jum Yong Park , Sung Jun Kim
- Applicant: Jong Han Shin , Hyung Soon Park , Jum Yong Park , Sung Jun Kim
- Applicant Address: KR Gyeonggi-do
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: Ladas & Parry LLP
- Priority: KR10-2008-0000302 20080102
- Main IPC: H01L21/3205
- IPC: H01L21/3205 ; H01L21/4763

Abstract:
A method for manufacturing a semiconductor device having a vertical transistor includes forming hard masks on a semiconductor substrate to expose portions of the semiconductor substrate. Then the exposed portions of the semiconductor substrate are etched to define grooves in the semiconductor substrate. A gate conductive layer is formed on the hard masks and surfaces of the grooves to a thickness that does not completely fill the grooves. A sacrificial layer is formed on the gate conductive layer to completely fill the grooves. A partial thickness of the sacrificial layer is removed to expose the gate conductive layer and portions of the gate conductive layer formed on the hard masks and on sidewalls of upper portions of the grooves are removed. The remaining sacrificial layer is completely removed. Gates are formed on sidewalls of lower portions of the grooves by etching the gate conductive layer.
Public/Granted literature
- US20090170302A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE HAVING VERTICAL TRANSISTOR Public/Granted day:2009-07-02
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