Invention Grant
- Patent Title: Split-gate type memory device
- Patent Title (中): 分闸式存储装置
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Application No.: US11777812Application Date: 2007-07-13
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Publication No.: US07872298B2Publication Date: 2011-01-18
- Inventor: Yasuhiro Shimamoto , Digh Hisamoto , Tetsuya Ishimaru , Shinichiro Kimura
- Applicant: Yasuhiro Shimamoto , Digh Hisamoto , Tetsuya Ishimaru , Shinichiro Kimura
- Applicant Address: JP Kawasaki-shi
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-shi
- Agency: Miles & Stockbridge P.C.
- Priority: JP2006-212321 20060803
- Main IPC: H01L29/788
- IPC: H01L29/788

Abstract:
Performance and reliability of a semiconductor device including a non-volatile memory are improved. A memory cell of the non-volatile memory includes, over an upper portion of a semiconductor substrate, a select gate electrode formed via a first dielectric film and a memory gate electrode formed via a second dielectric film formed of an ONO multilayered film having a charge storing function. The first dielectric film functions as a gate dielectric film, and includes a third dielectric film made of silicon oxide or silicon oxynitride and a metal-element-containing layer made of a metal oxide or a metal silicate formed between the select gate electrode and the third dielectric film. A semiconductor region positioned under the memory gate electrode and the second dielectric film has a charge density of impurities lower than that of a semiconductor region positioned under the select gate electrode and the first dielectric film.
Public/Granted literature
- US20080029805A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME Public/Granted day:2008-02-07
Information query
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