Invention Grant
US07872938B2 Soft error robust static random access memory cell storage configuration.
有权
软错误鲁棒的静态随机存取存储单元存储配置。
- Patent Title: Soft error robust static random access memory cell storage configuration.
- Patent Title (中): 软错误鲁棒的静态随机存取存储单元存储配置。
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Application No.: US12549757Application Date: 2009-08-28
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Publication No.: US07872938B2Publication Date: 2011-01-18
- Inventor: Manoj Sachdev , Shah M Jahinuzzaman
- Applicant: Manoj Sachdev , Shah M Jahinuzzaman
- Applicant Address: CA Waterloo, ON
- Assignee: CertiChip Inc.
- Current Assignee: CertiChip Inc.
- Current Assignee Address: CA Waterloo, ON
- Main IPC: G11C8/00
- IPC: G11C8/00

Abstract:
A Static Random Access Memory (SRAM) cell storage configuration is described, having an improved robustness to radiation induced soft errors. The SRAM cell storage configuration comprises the following elements. First and second storage nodes are configured to store complementary voltages. Drive transistors are configured to selectively couple one of the first and second storage nodes to ground. Load transistors are configured to selectively couple the other one of the first and second storage nodes to a power supply. At least one stabilizer transistor is configured to provide a corresponding redundant storage node and limit feedback between the first and second storage nodes, the redundant storage node being capable of restoring the first or second storage nodes in case of a soft error.
Public/Granted literature
- US20090316505A1 Soft Error Robust Static Random Access Memory Cell Storage Configuration Public/Granted day:2009-12-24
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