Invention Grant
US07872982B2 Implementing an error log analysis model to facilitate faster problem isolation and repair
失效
实施错误日志分析模型,以便更快地解决问题的隔离和修复
- Patent Title: Implementing an error log analysis model to facilitate faster problem isolation and repair
- Patent Title (中): 实施错误日志分析模型,以便更快地解决问题的隔离和修复
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Application No.: US11537823Application Date: 2006-10-02
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Publication No.: US07872982B2Publication Date: 2011-01-18
- Inventor: Mark G. Atkins , Michal B. Cohen , John W. Doxtader , Chetan Mehta , Patrick J. Sugrue
- Applicant: Mark G. Atkins , Michal B. Cohen , John W. Doxtader , Chetan Mehta , Patrick J. Sugrue
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Dillon & Yudell LLP
- Main IPC: G01R31/08
- IPC: G01R31/08

Abstract:
A system, method, and computer-readable medium for detecting errors on a network. According to a preferred embodiment of the present invention, a network error manager retrieves a network topology from a master subnet manager, wherein the network includes a collection of devices coupled by a first interconnect type. When a connectivity failure is detected in the first interconnect type, the network error manager receives from the master subnet manager at least one event notification via a second interconnect type. An error log analysis component identifies at least one device among the collection of devices as a possible cause of the connectivity failure in the first interconnect type. The network error manager retrieves events from at least one device among the collection of devices that can influence a state of the first interconnect type.
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