Invention Grant
- Patent Title: Methods and systems for optimizing designs of integrated circuits
- Patent Title (中): 集成电路设计优化的方法和系统
-
Application No.: US11726777Application Date: 2007-03-22
-
Publication No.: US07873930B2Publication Date: 2011-01-18
- Inventor: Jovanka Ciric Vujkovic , Kenneth S. McElvain
- Applicant: Jovanka Ciric Vujkovic , Kenneth S. McElvain
- Applicant Address: US CA Sunnyvale
- Assignee: Synopsys, Inc.
- Current Assignee: Synopsys, Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
Methods and systems for optimizing and/or designing integrated circuits. One exemplary method includes routing, as part of a process of designing an integrated circuit (IC), connections on a representation of the IC using a first set of wiring resources and marking wiring resources as used once the wiring resources within the first set have been used for routing and routing, using a second set of wiring resources in the representation, connections on the IC without checking whether wiring resources within the second set have been previously used to route connections, wherein wiring resources in the second set differ, on average, in physical size, from wiring resources in the first set. Other methods and systems for optimizing and/or designing ICs are also described, and machine-readable media containing executable program instructions which cause systems to perform one or more of these methods are also described.
Public/Granted literature
- US20070240091A1 Methods and systems for optimizing designs of integrated circuits Public/Granted day:2007-10-11
Information query