CMOS structure including differential channel stressing layer compositions

Invention Grant

US07875511B2 CMOS structure including differential channel stressing layer compositions 有权

Title translation: CMOS结构包括差分沟道应力层组成

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Patent Title: CMOS structure including differential channel stressing layer compositions
Patent Title (中): CMOS结构包括差分沟道应力层组成
Application No.: US11685458

Application Date: 2007-03-13
Publication No.: US07875511B2

Publication Date: 2011-01-25
Inventor: Liu Yaocheng , Ricardo A. Donaton , Kern Rim
Applicant: Liu Yaocheng , Ricardo A. Donaton , Kern Rim
Applicant Address: US NY New York
Assignee: International Business Machines Corporation
Current Assignee: International Business Machines Corporation
Current Assignee Address: US NY New York
Agency: Scully, Scott, Murphy & Presser, P.C.
Agent H. Daniel Schnumann
Main IPC: H01L21/8238
IPC: H01L21/8238

CMOS structure including differential channel stressing layer compositions

Abstract:

A CMOS structure includes an n-FET device comprising an n-FET channel region and a p-FET device comprising a p-FET channel region. The n-FET channel region includes a first silicon material layer located upon a silicon-germanium alloy material layer. The p-FET channel includes a second silicon material layer located upon a silicon-germanium-carbon alloy material layer. The silicon-germanium alloy material layer induces a desirable tensile strain within the n-FET channel. The silicon-germanium-carbon alloy material layer suppresses an undesirable tensile strain within the p-FET channel region. A silicon-germanium-carbon alloy material from which is comprised the silicon-germanium-carbon alloy material layer may be formed by selectively incorporating carbon into a silicon-germanium alloy material from which is formed the silicon-germanium alloy material layer.

Abstract(Chinese):

CMOS结构包括包括n-FET沟道区的n-FET器件和包括p-FET沟道区的p-FET器件。 n-FET沟道区包括位于硅 - 锗合金材料层上的第一硅材料层。 p-FET沟道包括位于硅 - 锗 - 碳合金材料层上的第二硅材料层。硅 - 锗合金材料层在n-FET通道内引起所需的拉伸应变。硅 - 锗 - 合金材料层抑制了p-FET沟道区内的不希望的拉伸应变。可以通过选择性地将碳包含在形成硅 - 锗合金材料层的硅 - 锗合金材料中来形成由硅 - 锗 - 碳合金材料层构成的硅 - 锗 - 碳合金材料。

Public/Granted literature

US20080224218A1 CMOS STRUCTURE INCLUDING DIFFERENTIAL CHANNEL STRESSING LAYER COMPOSITIONS Public/Granted day:2008-09-18

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232	......场效应工艺
H01L21/8234	.......MIS工艺
H01L21/8238	........互补场效应晶体管，例如CMOS