Invention Grant
US07877871B2 Method of manufacturing an electronic circuit formed on a substrate
有权
制造形成在基板上的电子电路的方法
- Patent Title: Method of manufacturing an electronic circuit formed on a substrate
- Patent Title (中): 制造形成在基板上的电子电路的方法
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Application No.: US12230280Application Date: 2008-08-27
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Publication No.: US07877871B2Publication Date: 2011-02-01
- Inventor: Hideo Aoki , Naoko Yamaguchi , Chiaki Takubo , Toshiaki Yamauchi , Koji Imamiya , Hiroshi Hashizume
- Applicant: Hideo Aoki , Naoko Yamaguchi , Chiaki Takubo , Toshiaki Yamauchi , Koji Imamiya , Hiroshi Hashizume
- Applicant Address: JP Tokyo JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba,Toshiba TEC Corporation
- Current Assignee: Kabushiki Kaisha Toshiba,Toshiba TEC Corporation
- Current Assignee Address: JP Tokyo JP Tokyo
- Agency: Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P.
- Priority: JPP2004-114059 20040408; JPP2004-115795 20040409; JPP2004-163408 20040601
- Main IPC: H05K3/02
- IPC: H05K3/02 ; G03G15/16

Abstract:
An image forming apparatus comprises an exposure unit forming an electrostatic latent image on a photo conductor based on image information, a developing unit developing the electrostatic latent image by toner made of formation material of a circuitry layer, and an electrostatic transferring unit transferring a toner image on the photo conductor onto a substrate. The toner image is transferred so as to cover at least a part of a conductor layer formed on the substrate. At this time, excessive charges caused in the conductor layer accompanying the start of the transfer of the toner image are removed. Alternatively, charges of which polarity is reverse to that of the toner are added to the conductor layer. These allow the circuitry layer to be formed to have a desired pattern favorably and securely on the conductor layer.
Public/Granted literature
- US20090007426A1 Image forming apparatus and method of manufacturing electronic circuit using the same Public/Granted day:2009-01-08
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