A semiconductor device including a SRAM cell may include a data holding unit including a driver transistor and a load transistor, and receiving and holding data; and a data transferring unit including a transfer gate transistor whose source and drain are connected between the data holding unit and one of a pair of bit lines, and whose gate is connected to a word line, the data transferring unit either transferring the data transferred from the one of the pair of bit lines to the data holding unit or receiving the data held in the data holding unit and transferring the data to the one of the pair of bit lines, wherein at least one of the driver transistor and the load transistor has higher capacitance between the gate and the source and between the gate and the drain than the transfer gate transistor.