Invention Grant
- Patent Title: Integrated circuit arrangement
- Patent Title (中): 集成电路布置
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Application No.: US11680869Application Date: 2007-03-01
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Publication No.: US07880477B2Publication Date: 2011-02-01
- Inventor: Johann Peter Forstner
- Applicant: Johann Peter Forstner
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Eschweiler & Associates, LLC
- Priority: DE102007007357 20070214
- Main IPC: G01R29/26
- IPC: G01R29/26
Abstract:
An integrated circuit arrangement has a signal input 20 and a signal output 60, a signal processing unit 100 which is connected to the signal input 20 and to the signal output 60, a noise source 50 for generating a noise signal, and a noise line 55 which connects the noise source 50 to the signal input 20.
Public/Granted literature
- US20080191710A1 Integrated Circuit Arrangement Public/Granted day:2008-08-14
Information query
