A signal processing device suppresses a DC offset without omission of a low-frequency component of a signal in a receiver in a direct conversion system. The signal processing device includes an input terminal 29, a gain amplifier 31 that amplifies an input signal to generate an output signal, comparators 32 and 33 each of which compares an output signal level with a reference value, a capacitor 37, current source circuits 34 and 35, one of which charges or discharges electric charges stored in the capacitor when the output signal level falls outside a reference range according to results of comparisons by the comparators, a variable current source 36 through which current to be flow is controlled according to a potential at the capacitor, and a load circuit 38 that is connected between the input terminal and the variable current source and supplies a bias to the input terminal, together with the variable current source. When the output signal level falls within the reference voltage, the bias at the input terminal does not vary. Thus, a low-frequency component of the input signal is not omitted.