A serial interface circuit includes a plurality of serial transmitters for a plurality of channels, respectively; and a plurality of serial receivers provided for said plurality of channels and connected with said plurality of serial transmitters, respectively. Each of said plurality of serial transmitters transmits a serial signal. Each of said plurality of serial receivers includes a receiver circuit configured to convert the serial signal into a data sequence; n (n is an integer more than 1) register groups configured to shift the data sequence; a data processing circuit configured to perform a data process on said data sequence based on n outputs of said n register groups and a detection result; and a header detecting circuit configured to detect a header of the data sequence when said b register groups from a first register group to a bth register group among said n register groups shift the data sequence, and to output the detecting result to said data processing circuit.