Invention Grant
US07882293B2 Interrupt masking control 有权
中断屏蔽控制

Interrupt masking control
Abstract:
A processor core 4 is provided with an interrupt controller 22 which serves to set an interrupt mask bit F and a hardware control when an interrupt fiq occurs. A masking control signal NMI serves to either allow or prevent the software clearing of the interrupt mask bit F.
Public/Granted literature
Information query
Patent Agency Ranking
0/0