Invention Grant
US07882325B2 Method and apparatus for a double width load using a single width load port
失效
使用单宽度负载端口的双宽度负载的方法和装置
- Patent Title: Method and apparatus for a double width load using a single width load port
- Patent Title (中): 使用单宽度负载端口的双宽度负载的方法和装置
-
Application No.: US11963295Application Date: 2007-12-21
-
Publication No.: US07882325B2Publication Date: 2011-02-01
- Inventor: Zeev Sperber , Robert Valentine , Ehud Cohen , Doron Orenstien , Benny Eitan
- Applicant: Zeev Sperber , Robert Valentine , Ehud Cohen , Doron Orenstien , Benny Eitan
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agent Caroline M. Fleming
- Main IPC: G06F12/04
- IPC: G06F12/04

Abstract:
A single micro-instruction to perform either an N-bit or a 2N-bit load is provided. A microprocessor having an N-bit load port performs either an N-bit load or a 2N-bit load in a single cycle with the same micro-instruction being used for both the N-bit and the 2N-bit load.
Public/Granted literature
- US20090164763A1 METHOD AND APPARATUS FOR A DOUBLE WIDTH LOAD USING A SINGLE WIDTH LOAD PORT Public/Granted day:2009-06-25
Information query