Invention Grant
US07882628B2 Multi-chip packaging using an interposer such as a silicon based interposer with through-silicon-vias 有权
使用诸如具有通硅通孔的硅基插入件的插入器的多芯片封装

Multi-chip packaging using an interposer such as a silicon based interposer with through-silicon-vias
Abstract:
The formation of electronic assemblies is described. One embodiment includes providing a body and forming a first metal pad layer on a first surface thereof. A second metal pad layer is formed in contact with the first metal pad layer, the second metal pad layer having a denser pitch than the first metal pad layer. A dielectric layer is formed between the metal pads in the first and second metal pad layers. Vias extending through the body from a second surface thereof are formed, the vias exposing the first metal pad layer. An insulating layer is formed on via sidewalls and on the second surface, and an electrically conductive layer formed on the insulating layer and on the exposed surface of the first metal layer. Elements are coupled to the second metal pad layer and the electrically conductive layer coupled to a substrate. Other embodiments are described and claimed.
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