Invention Grant
- Patent Title: Electronic package and method of forming the same
- Patent Title (中): 电子封装及其形成方法
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Application No.: US11742521Application Date: 2007-04-30
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Publication No.: US07883937B1Publication Date: 2011-02-08
- Inventor: Teck-Gyu Kang , Yuan Li , Yuanlin Xie
- Applicant: Teck-Gyu Kang , Yuan Li , Yuanlin Xie
- Applicant Address: US CA San Jose
- Assignee: Altera Corporation
- Current Assignee: Altera Corporation
- Current Assignee Address: US CA San Jose
- Agency: Martine Penilla & Gencarella, LLP
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
The present invention is directed to a method and electronic computer package that is formed by placing an integrated circuit, having a plurality of bonding pads with solder bumps deposited thereon, in contact with the substrate so that one of the plurality of solder bumps is in superimposition with respect to one of the contacts and one of the plurality of bonding pads, with a volume being defined between region of the substrate in superimposition with the integrated circuit. A portion of the volume is filled with a quantity of underfill. A fluid flow barrier is formed on the substrate and defines a perimeter of the volume, defining a flow restricted region. The fluid flow barrier has dimensions sufficient to control the quantity of underfill egressing from the flow restricted region.
Information query
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