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US07883955B2 Gate dielectric/isolation structure formation in high/low voltage regions of semiconductor device 有权
在半导体器件的高/低电压区域形成栅介质/隔离结构

  • Patent Title: Gate dielectric/isolation structure formation in high/low voltage regions of semiconductor device
  • Patent Title (中): 在半导体器件的高/低电压区域形成栅介质/隔离结构
  • Application No.: US12755320
    Application Date: 2010-04-06
  • Publication No.: US07883955B2
    Publication Date: 2011-02-08
  • Inventor: Yoichi Okumura
  • Applicant: Yoichi Okumura
  • Applicant Address: US TX Dallas
  • Assignee: Texas Instruments Incorporated
  • Current Assignee: Texas Instruments Incorporated
  • Current Assignee Address: US TX Dallas
  • Agent Warren L. Franz; Wade J. Brady, III; Frederick J. Telecky, Jr.
  • Priority: JP2004-322774 20041105
  • Main IPC: H01L21/8238
  • IPC: H01L21/8238
Gate dielectric/isolation structure formation in high/low voltage regions of semiconductor device
Abstract:
A semiconductor device has a thicker gate dielectric layer (gate-insulation film 16 of, e.g., 40 nm) for a high voltage PMOS transistor (Tr1) that is formed simultaneously in a first thermal oxidation process together with the formation of LOCOS isolation structures (3) for element seaaration of low voltage PMOS and NMOS transistors (Tr3, Tr4), and has a thinner gate dielectric layer (gate-insulation film 25 of, e.g., 7 nm) for a high voltage NMOS transistor (Tr2) that is formed simultaneously in a second thermal oxidation process together with the formation of gate dielectric layers (gate-insulation films 33, 42) of low voltage PMOS and NMOS transistors (Tr3, Tr4).
Abstract(Chinese):

半导体器件具有用于在第一热氧化过程中同时形成的高电压PMOS晶体管（Tr1）的较厚的栅极介电层（例如40nm的栅极绝缘膜16）以及LOCOS隔离结构的形成（ 3）用于低压PMOS和NMOS晶体管（Tr3，Tr4）的元件制造，并且对于形成的高电压NMOS晶体管（Tr2）具有较薄的栅介质层（例如7nm的栅极绝缘膜25） 同时在第二热氧化过程中与低电压PMOS和NMOS晶体管（Tr3，Tr4）的栅极介电层（栅极绝缘膜33,42）的形成一起。

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IPC分类:
H 电学
H01 基本电气元件
H01L 半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00 专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70 .由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77 ..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78 ...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82 ....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822 .....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232 ......场效应工艺
H01L21/8234 .......MIS工艺
H01L21/8238 ........互补场效应晶体管，例如CMOS
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