Invention Grant
- Patent Title: Semiconductor device fabrication method
- Patent Title (中): 半导体器件制造方法
-
Application No.: US12489544Application Date: 2009-06-23
-
Publication No.: US07884008B2Publication Date: 2011-02-08
- Inventor: Kiyonori Watanabe
- Applicant: Kiyonori Watanabe
- Applicant Address: JP Tokyo
- Assignee: Oki Semiconductor Co., Ltd.
- Current Assignee: Oki Semiconductor Co., Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Volentine & Whitt, P.L.L.C.
- Priority: JP2004-372615 20041224
- Main IPC: H01L23/52
- IPC: H01L23/52 ; H01L23/48

Abstract:
A method of forming a semiconductor device including a semiconductor substrate with circuit elements and electrode pads formed on one surface. This surface is covered by a dielectric layer with openings above the electrode pads. A metal layer is deposited on the dielectric layer and patterned to form a conductive pattern with traces leading to the electrode pads. A protective layer having openings exposing part of the conductive pattern is formed. Each opening is covered by an electrode such as a solder bump, which is electrically connected through the conductive pattern to one of the electrode pads. The method enables the thickness of the protective layer, which may function as a package of the semiconductor device, to be reduced. The protective layer may be formed from a photosensitive material, simplifying the formation of the openings for the electrodes.
Public/Granted literature
- US20090258486A1 SEMICONDUCTOR DEVICE FABRICATION METHOD Public/Granted day:2009-10-15
Information query
IPC分类: