Invention Grant
- Patent Title: Void-free copper filling of recessed features for semiconductor devices
- Patent Title (中): 半导体器件凹陷特征的无孔铜填充
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Application No.: US11864566Application Date: 2007-09-28
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Publication No.: US07884012B2Publication Date: 2011-02-08
- Inventor: Kenji Suzuki , Tadahiro Ishizaka , Miho Jomen , Jonathan Rullan
- Applicant: Kenji Suzuki , Tadahiro Ishizaka , Miho Jomen , Jonathan Rullan
- Applicant Address: JP Tokyo
- Assignee: Tokyo Electron Limited
- Current Assignee: Tokyo Electron Limited
- Current Assignee Address: JP Tokyo
- Agency: Wood, Herron & Evans, LLP
- Main IPC: H01L21/4763
- IPC: H01L21/4763

Abstract:
A method is provided for void-free copper (Cu) filling of recessed features in a semiconductor device. The method includes providing a patterned substrate containing a recessed feature, depositing a barrier film on the patterned substrate, including in the recessed feature, depositing a Ru metal film on the barrier film, and depositing a discontinuous Cu seed layer on the Ru metal film, where the Cu seed layer partially covers the Ru metal film in the recessed feature. The method further includes exposing the substrate to an oxidation source gas that oxidizes the Cu seed layer and the portion of the Ru metal film not covered by the Cu seed layer, heat-treating the oxidized Cu seed layer and the oxidized Ru metal film under high vacuum conditions or in the presence of an inert gas to activate the oxidized Ru metal film for Cu plating, and filling the recessed feature with bulk Cu metal. The exposure to the oxidation source gas can be an air exposure commonly encountered in semiconductor device manufacturing prior to Cu plating.
Public/Granted literature
- US20090087981A1 VOID-FREE COPPER FILLING OF RECESSED FEATURES FOR SEMICONDUCTOR DEVICES Public/Granted day:2009-04-02
Information query
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