Invention Grant
- Patent Title: Pattern-print thin-film transistors with top gate geometry
- Patent Title (中): 具有顶栅几何形状的图案印刷薄膜晶体管
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Application No.: US12817127Application Date: 2010-06-16
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Publication No.: US07884361B2Publication Date: 2011-02-08
- Inventor: William Wong , Rene Lujan , Eugene Chow
- Applicant: William Wong , Rene Lujan , Eugene Chow
- Applicant Address: US CA Palo Alto
- Assignee: Palo Alto Research Center Incorporated
- Current Assignee: Palo Alto Research Center Incorporated
- Current Assignee Address: US CA Palo Alto
- Agent Jonathan A. Small
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A self-aligned, thin-film, top-gate transistor and method of manufacturing same are disclosed. A first print-patterned mask is formed over a metal layer by digital lithography, for example by printing with a phase change material using a droplet ejector. The metal layer is then etched using the first print-patterned mask to form source and drain electrodes. A semiconductive layer and an insulative layer are formed thereover. A layer of photosensitive material is then deposited and exposed through the substrate, with the source and drain electrodes acting as masks for the exposure. Following development of the photosensitive material, a gate metal layer is deposited. A second print-patterned mask is then formed over the device, again by digital lithography. Etching and removal of the photosensitive material leaves the self-aligned top-gate electrode.
Public/Granted literature
- US20100252927A1 Pattern-Print Thin-Film Transistors with Top Gate Geometry Public/Granted day:2010-10-07
Information query
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