Invention Grant
- Patent Title: Insulation covering structure for a semiconductor element with a single die dimension and a manufacturing method thereof
- Patent Title (中): 具有单模尺寸的半导体元件的绝缘覆盖结构及其制造方法
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Application No.: US12241492Application Date: 2008-09-30
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Publication No.: US07884462B2Publication Date: 2011-02-08
- Inventor: Liang-Chieh Wu , Hui-Ming Feng
- Applicant: Liang-Chieh Wu , Hui-Ming Feng
- Applicant Address: TW Hsinchu
- Assignee: Inpaq Technology Co., Ltd.
- Current Assignee: Inpaq Technology Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Nikolai & Mersereau, P.A.
- Agent C. G. Mersereau
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L23/053 ; H01L23/12 ; H01L29/40
Abstract:
An insulation covering structure for a semiconductor element with a single die dimension includes: a semiconductor element with a single die dimension and an insulation covering layer. The semiconductor element has a front side surface, a rear side surface, a left side surface, a right side surface, a bottom surface, and a top surface. The top surface of the semiconductor element has two metal pads. The insulation covering layer covers the front side surface, the rear side surface, the left side surface, the right side surface, and the bottom surface of the semiconductor element. A manufacturing process for covering the semiconductor element with a single die dimension is also disclosed.
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