Invention Grant
- Patent Title: Successive approximate capacitance measurement circuit
- Patent Title (中): 连续近似电容测量电路
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Application No.: US11983291Application Date: 2007-11-07
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Publication No.: US07884621B2Publication Date: 2011-02-08
- Inventor: Warren S. Snyder
- Applicant: Warren S. Snyder
- Applicant Address: US CA San Jose
- Assignee: Cypress Semiconductor Corporation
- Current Assignee: Cypress Semiconductor Corporation
- Current Assignee Address: US CA San Jose
- Main IPC: G01R27/26
- IPC: G01R27/26

Abstract:
A capacitance measurement circuit includes a current source, a switch, and a comparator. The current source is coupled to drive a current through a circuit node. The switch is coupled to the circuit node to switch the current into a device under test (“DUT”) capacitor. The comparator includes first and second input ports. The comparator is coupled to compare a first voltage received on the first input port against a reference voltage received on the second input port. The first voltage is related to the current driven through the circuit node, a frequency at which the switch is switched, and a capacitance of the DUT capacitor.
Public/Granted literature
- US20080068030A1 Successive approximate capacitance measurement circuit Public/Granted day:2008-03-20
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