Invention Grant
- Patent Title: Probe card layout
- Patent Title (中): 探针卡布局
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Application No.: US12512844Application Date: 2009-07-30
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Publication No.: US07884629B2Publication Date: 2011-02-08
- Inventor: John Caldwell
- Applicant: John Caldwell
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Fletcher Yoder
- Main IPC: G01R31/02
- IPC: G01R31/02

Abstract:
Multi-touchdown, parallel test probe cards having probe elements arranged to provide greater efficiency during testing of a substrate having a plurality of die thereon. Probe elements may be arranged in a number of configurations that allow for efficient usage of the probe elements.
Public/Granted literature
- US20090289651A1 PROBE CARD LAYOUT Public/Granted day:2009-11-26
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