Invention Grant
US07885125B2 Semiconductor memory device having integrated driving word line intermediate voltages by pull-up circuits 失效
具有通过上拉电路集成驱动字线中间电压的半导体存储器件

Semiconductor memory device having integrated driving word line intermediate voltages by pull-up circuits
Abstract:
A semiconductor memory device comprises a logic circuit supplied with a first supply voltage; a cell array supplied with a second supply voltage higher than the first supply voltage and including plural mutually intersecting word lines and bit lines and plural memory cells connected at intersections thereof; and a word line driver operative to drive the word lines. The word line driver includes plural pull-up circuits connected between the supply terminal of the first supply voltage and the drive terminal of the word line and between the supply terminal of the second supply voltage and the drive terminal of the word line, and a pull-down circuit connected between the drive terminal of the word line and the ground terminal, and drives the word line with an intermediate voltage between the first and second supply voltages in accordance with a driving force ratio between the plural pull-up circuits at the time of driving the word line.
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