A semiconductor memory device that prevents a power noise generated at a data input/output pad in a read operation from affecting a data strobe signal pad. The semiconductor memory device includes first power supply voltage pads for a data output circuit, a first power mesh, and a second power supply voltage pad for a data strobe signal output circuit. The first power mesh connects first power supply voltage pads to one another. The second power supply voltage pad is electrically separated from the first power mesh.