An exemplary thin film transistor array substrate (200) includes a transparent substrate (261), a plurality of gate lines (201) and a plurality of data lines (202) formed at the transparent substrate, the gate lines and the data lines crossing each other thereby defining a plurality of pixel regions (230). Each of the pixel regions includes a storage capacitor (220). The storage capacitor includes a first capacitor and a second capacitor aligned along a direction generally perpendicular to the transparent substrate, and the first capacitor and the second capacitor are electrically connected in parallel.