Invention Grant
US07885612B2 Clock generation circuit and semiconductor device provided therewith
有权
时钟生成电路及与此相关的半导体装置
- Patent Title: Clock generation circuit and semiconductor device provided therewith
- Patent Title (中): 时钟生成电路及与此相关的半导体装置
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Application No.: US12219468Application Date: 2008-07-23
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Publication No.: US07885612B2Publication Date: 2011-02-08
- Inventor: Takeshi Osada
- Applicant: Takeshi Osada
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Eric J. Robinson, Robinson Intellectual Property Law Office, P.C.
- Priority: JP2005-158220 20050530
- Main IPC: H03K3/03
- IPC: H03K3/03 ; H03L7/06 ; H03L7/08 ; H03L7/085 ; H03L7/099 ; H03L7/18 ; H04B1/40

Abstract:
It is an object of the present invention to solve a problem that malfunction of communication is generated by varying a frequency of a clock due to noise from outside in a case where there is no supplied signal in a circuit which performs negative feedback control so that the supplied signal and the feedback signal can maintain a fixed phase relationship between the signals. The present invention provides a configuration including a PLL circuit and an oscillator circuit, where a switch for switching an output between a signal from the PLL circuit and a signal from the oscillator circuit to the signal output portion is provided to switch from a connection to the PLL circuit to a connection to the oscillator circuit in a case where there is no received signal.
Public/Granted literature
- US20080287073A1 Clock generation circuit and semiconductor device provided therewith Public/Granted day:2008-11-20
Information query
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