Invention Grant
US07885782B2 Method in an integrated circuit (IC) manufacturing process for identifying and redirecting ICs mis-processed during their manufacture
失效
集成电路(IC)制造过程中用于识别和重定向在其制造期间被错误处理的IC的方法
- Patent Title: Method in an integrated circuit (IC) manufacturing process for identifying and redirecting ICs mis-processed during their manufacture
- Patent Title (中): 集成电路(IC)制造过程中用于识别和重定向在其制造期间被错误处理的IC的方法
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Application No.: US11582141Application Date: 2006-10-17
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Publication No.: US07885782B2Publication Date: 2011-02-08
- Inventor: Raymond J. Beffa
- Applicant: Raymond J. Beffa
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: TraskBritt
- Main IPC: G01R31/00
- IPC: G01R31/00 ; G01R31/14 ; G01N37/00

Abstract:
A method of manufacturing IC devices from semiconductor wafers includes providing the wafers and fabricating ICs on the wafers. At probe, a unique fuse ID is stored in each IC, and an electronic wafer map is electronically stored for each wafer indicating the locations of good and bad ICs on the wafer and the fuse IDs of the ICs on the wafer. Each IC is then separated from its wafer to form an IC die, and the IC dice are assembled into IC devices. At the opens/shorts test at the end of assembly, the fuse ID of each IC in each device is automatically retrieved so the wafer map of the IC device may be accessed and evaluated to identify any IC devices containing bad ICs that have accidentally been assembled into IC devices. Any “bad” IC devices are discarded while remaining IC devices continue on to back-end testing.
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