Invention Grant
US07888706B2 High-efficiency filler cell with switchable, integrated buffer capacitance for high frequency applications
有权
高效率的填充单元,具有可切换的集成缓冲电容,用于高频应用
- Patent Title: High-efficiency filler cell with switchable, integrated buffer capacitance for high frequency applications
- Patent Title (中): 高效率的填充单元,具有可切换的集成缓冲电容,用于高频应用
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Application No.: US11444128Application Date: 2006-05-31
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Publication No.: US07888706B2Publication Date: 2011-02-15
- Inventor: Pramod Acharya
- Applicant: Pramod Acharya
- Applicant Address: DE Munich
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Munich
- Agency: Brinks Hofer Gilson & Lione
- Main IPC: H01L27/10
- IPC: H01L27/10

Abstract:
A cell based integrated circuit chip includes a top voltage supply rail and a bottom voltage supply rail and a plurality of metal layers defining at least one filler cell. The filler cell is formed by a first field effect transistor of a first type conductivity, typically an n-channel MOSFET. The source or drain electrodes of the n-channel MOSFET are arranged to as act as a capacitor with respect to the bottom voltage supply rail and to which at least one of the source and drain electrodes is connected. A second field effect transistor of an opposite-type conductivity to the first field effect transistor, typically a p-channel MOSFET, is also provided. The source or drain electrodes of the p-channel MOSFET are connected in series between the top voltage supply rail and a gate electrode of the n-channel MOSFET. The gate electrode of the p-channel MOSFET is connected to a source of ground potential via a resistor.
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