A power semiconductor having a first, second, third, and fourth semiconductor layer on top of each other, two trench gates parallel and adjacent to each other, each having a trench in the fourth semiconductor layer with the a trench bottom portion reaching into the third semiconductor layer, a gate insulation film lining the trench, and a gate electrode filling the trench being lined with the gate insulation film, two first semiconductor region regions provided contiguously bordering on one side of each of the two trench gates, located at the outer sides of each of the two adjacent trench gates, and located in the top side of the fourth semiconductor layer, a first main electrode on the fourth semiconductor layer, and a second main electrode provided on a bottom of the first semiconductor layer.