Invention Grant
- Patent Title: Three-dimensional integrated circuit structure
- Patent Title (中): 三维集成电路结构
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Application No.: US11606523Application Date: 2006-11-30
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Publication No.: US07888764B2Publication Date: 2011-02-15
- Inventor: Sang-Yun Lee
- Applicant: Sang-Yun Lee
- Agency: Schmeiser Olsen & Watts LLP
- Priority: KR10-2003-0040920 20030624; KR10-2003-0047515 20030712
- Main IPC: H01L31/06
- IPC: H01L31/06

Abstract:
A semiconductor structure includes an interconnect region and a semiconductor stack bonded to the interconnect region through a bonding region. The stack includes at least two semiconductor layers having different electrical properties. The stack also includes single crystalline semiconductor material. The stack can be processed to form a mesa structure and the mesa structure can be processed to from a vertically oriented semiconductor device.
Public/Granted literature
- US20070077694A1 Three-dimensional integrated circuit structure Public/Granted day:2007-04-05
Information query
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