Invention Grant
US07888952B2 Circuit arrangement for balancing a resistance circuit 有权
用于平衡电阻电路的电路布置

Circuit arrangement for balancing a resistance circuit
Abstract:
A circuit arrangement is provided for balancing a resistance circuit, which has a field-effect transistor as a controllable resistor and a control circuit, by which the field-effect transistor can be controlled with a gate-source voltage so that there is a resistance between a drain electrode and a source electrode of the field-effect transistor in a predefinable ratio to a reference resistor. In a balancing operation mode, a reference current can be set by the drain-source path of the field-effect transistor and by the reference resistor, which depends on a differential voltage between a voltage drop, caused by the reference current at the reference resistor and a voltage drop, caused by the reference current, at the drain-source path of the field-effect transistor.
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