A three-dimensional memory device includes: a plurality of mats laminated therein, each having memory cells arranged in a two-dimensional manner; and access signal lines and data lines to select memory cells in each mat being shared between respective adjacent mats. Laminated mats are divided into three or more groups. When selecting one of these groups, memory cells in some of the remaining groups are biased so that a leakage current flows therethrough, while memory cells in the rest of the remaining groups are biased so that a leakage current does not flow therethrough.