Invention Grant
- Patent Title: Test circuit for performing multiple test modes
- Patent Title (中): 用于执行多种测试模式的测试电路
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Application No.: US12476390Application Date: 2009-06-02
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Publication No.: US07890286B2Publication Date: 2011-02-15
- Inventor: Young-Do Hur
- Applicant: Young-Do Hur
- Applicant Address: KR
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR
- Agency: Baker & McKenzie LLP
- Main IPC: G01R31/14
- IPC: G01R31/14

Abstract:
A test circuit includes a first reset pulse generator configured to generate a first reset pulse when a test mode is performed or when power is up, a test mode maintenance signal generator configured to provide a test mode maintenance signal activated in response to a predetermined consecutive test information data, the activation of the test mode maintenance signal being controlled by the first reset pulse, a second reset pulse generator configured to generate a second reset pulse when the test information data is received as a predetermined test mode reset data or when power is up, and a test mode selection signal generator configured to receive the test information data provided from the test mode maintenance signal generator and the test mode maintenance signal and to generate a specific test mode selection signal, the activation of the specific test mode selection signal being controlled by the second reset pulse.
Public/Granted literature
- US20090240460A1 TEST CIRCUIT FOR PERFORMING MULTIPLE TEST MODES Public/Granted day:2009-09-24
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