Invention Grant
US07890900B2 Various methods and apparatuses for effective yield enhancement of good chip dies having memories per wafer 有权
用于有效提高具有每个晶片存储器的芯片模具的各种方法和装置

Various methods and apparatuses for effective yield enhancement of good chip dies having memories per wafer
Abstract:
A method and apparatus are described in which an optimal configuration of memory instances is determined. The optimal configuration of memory instances to be fabricated with built-in repair capacity and memory instances that are non-repairable may provide a maximum number of good chip dies per wafer. An amount of memory instances to be fabricated with built-in repair capacity as well as a remaining amount of memory instances to be fabricated without any built-in repair components in the integrated circuit design is determined relative to achieving the maximum number of good chip dies per wafer for a given defect density and wafer area. The amount of good dies produced per fabricated wafer for a populated amount of memories with built-in repair components is determined to be between an amount established by a minimum limit for the die area up to the amount established by a maximum limit for the die area.
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