Invention Grant
US07897447B2 Use of in-situ HCL etch to eliminate by oxidation recrystallization border defects generated during solid phase epitaxy (SPE) in the fabrication of nano-scale CMOS transistors using direct silicon bond substrate (DSB) and hybrid orientation technology (HOT)
有权
在使用直接硅键合衬底（DSB）和混合取向技术（HOT）的纳米尺度CMOS晶体管的制造中，使用原位HCL蚀刻来消除固相外延（SPE）期间产生的氧化重结晶边界缺陷。
- Patent Title: Use of in-situ HCL etch to eliminate by oxidation recrystallization border defects generated during solid phase epitaxy (SPE) in the fabrication of nano-scale CMOS transistors using direct silicon bond substrate (DSB) and hybrid orientation technology (HOT)
- Patent Title (中): 在使用直接硅键合衬底（DSB）和混合取向技术（HOT）的纳米尺度CMOS晶体管的制造中，使用原位HCL蚀刻来消除固相外延（SPE）期间产生的氧化重结晶边界缺陷。
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Application No.: US12391657Application Date: 2009-02-24
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Publication No.: US07897447B2Publication Date: 2011-03-01
- Inventor: Angelo Pinto
- Applicant: Angelo Pinto
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Warren L. Franz; Wade J. Brady, III; Frederick J. Telecky, Jr.
- Main IPC: H01L21/8234
- IPC: H01L21/8234
Abstract:
A method for reducing defects at an interface between a amorphized, recrystallized cleaved wafer layer and an unamorphized cleaved wafer layer can comprise an anneal and an exposure to hydrochloric acid. The anneal and acid exposure can be performed within an epitaxial reactor chamber to minimize wafer transport.
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