A device having the capability for electrical, thermal, optical, and fluidic interconnections to various layers. Through-substrate vias in the interconnect device are filled to enable electrical and thermal connection or optionally hermetically sealed relative to other surfaces to enable fluidic or optical connection. Optionally, optical components may be placed within the via region in order to manipulate optical signals. Redistribution of electrical interconnection is accomplished on both top and bottom surfaces of the substrate of the interconnect chip.