Invention Grant
US07898031B2 Semiconductor device with tapered trenches and impurity concentration gradients
有权
具有锥形沟槽和杂质浓度梯度的半导体器件
- Patent Title: Semiconductor device with tapered trenches and impurity concentration gradients
- Patent Title (中): 具有锥形沟槽和杂质浓度梯度的半导体器件
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Application No.: US12821708Application Date: 2010-06-23
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Publication No.: US07898031B2Publication Date: 2011-03-01
- Inventor: Kenichi Tokano , Tetsuo Matsuda , Wataru Saito
- Applicant: Kenichi Tokano , Tetsuo Matsuda , Wataru Saito
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2005-055369 20050301
- Main IPC: H01L29/772
- IPC: H01L29/772

Abstract:
A single crystal semiconductor layer of a first conduction type is disposed on a surface of a semiconductor substrate. A plurality of trenches are provided in the semiconductor layer to form a plurality of first semiconductor regions of the first conduction type at intervals in a direction parallel to the surface. An epitaxial layer is buried in the plurality of trenches to form a plurality of second semiconductor regions of a second conduction type. The plurality of second semiconductor regions each includes an outer portion with a high impurity concentration formed against an inner wall of the trench, and an inner portion with a low impurity concentration formed inner than the outer portion.
Public/Granted literature
- US20100258854A1 SEMICONDUCTOR DEVICE Public/Granted day:2010-10-14
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