Invention Grant
- Patent Title: Semiconductor chips having improved electrostatic discharge protection circuit arrangement
- Patent Title (中): 具有改善的静电放电保护电路布置的半导体芯片
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Application No.: US12292026Application Date: 2008-11-10
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Publication No.: US07898034B2Publication Date: 2011-03-01
- Inventor: Ki-Tae Lee , Han-Gu Kim , Jae-Hyok Ko
- Applicant: Ki-Tae Lee , Han-Gu Kim , Jae-Hyok Ko
- Applicant Address: KR Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Gyeonggi-do
- Agency: Harness, Dickey & Pierce, PLC
- Priority: KR10-2006-0009389 20060131
- Main IPC: H01L23/62
- IPC: H01L23/62
Abstract:
A semiconductor chip may include a plurality of pads arranged in at least a first and a second row, and a plurality of protection circuits connected to the plurality of pads. The plurality of protection circuits may include at least one diode. A first protection circuit may be connected to a first pad in the first row of pads, and a second protection circuit may be connected to a second pad in the second row of pads. The first and second protection circuits may be arranged under the first row of pads.
Public/Granted literature
- US20090080129A1 Semiconductor chips having improved electrostatic discharge protection circuit arrangement Public/Granted day:2009-03-26
Information query
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